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//--------------------------------------------------------------------------------------------------------- // // (C) Copyright 2002 - Analog Devices, Inc. All rights reserved. // // File Name: DMA_Burst.asm // // Date Modified: 4/11/02 Rev 1.0 // // Purpose: DMA burst mode example // //--------------------------------------------------------------------------------------------------------- #include <def21160.h>
#define N 16 // number of 32-bit words to transfer
.GLOBAL _main;
.section/dm seg_sbsram;
.var External_Buffer[N];
.endseg;
.section/dm seg_dmda;
.var Internal_TX_Buffer[N] =0x00000000, 0x11111111, 0x22222222, 0x33333333, 0x44444444, 0x55555555, 0x66666666, 0x77777777, 0x88888888, 0x99999999, 0xaaaaaaaa, 0xbbbbbbbb, 0xcccccccc, 0xdddddddd, 0xeeeeeeee, 0xffffffff; .var Internal_RX_Buffer[N];
.endseg;
.section/pm seg_pmco; start: _main:
// enable external port 0 DMA and global interupts bit set imask EP0I; bit set MODE1 IRPTEN;
// set MSIZE 1100 ustat1 = dm(SYSCON); bit set ustat1 0x0000C000; dm(SYSCON) = ustat1;
// set the External Port 0 waitstates to 1 ustat1 = dm(WAIT); bit set ustat1 0x00000080; bit clr ustat1 0x00000300; dm(WAIT) = ustat1;
// Fill destination buffer with 0s Clear_External_Buffer: b0 = 0; // clear b0 register i0 = External_Buffer; // point to the destination buffer l0 = 0; // no circular buffering m0 = 1; // set modify to 1 r0 = 0x00; // value to set dest to r1 = @External_Buffer; // set number of locations to clear lcntr = r1, do Clear_Ext_Memory until lce; dm(i0,m0) = r0; // clear the memory Clear_Ext_Memory: nop;
Clear_Internal_RX_Buffer: b0 = 0; // clear b0 register i0 = Internal_RX_Buffer; // point to the destination buffer l0 = 0; // no circular buffering m0 = 1; // set modify to 1 r0 = 0x00; // value to set dest to r1 = @Internal_RX_Buffer; // Set number of locations to clear lcntr = r1, do Clear_Int_Memory until lce; dm(i0,m0) = r0; // clear the memory Clear_Int_Memory: nop;
// Write 16 words of data from the Internal_TX_Buffer to the External SBSRAM // The DSP does not support burst write transfers becuase the single-cycle write // capability of SBSRAMs achieves the same throughput level, with less complexity. Setup_Send_Internal_Data_DMA: r0=0; dm(DMAC10)=r0; // Clear DMA Control Register r0=Internal_TX_Buffer; dm(II10)=r0; // load IIx register with int. mem. source r0=1; dm(IM10)=r0; // load internal modify value r0=@Internal_TX_Buffer; dm(C10)=r0; // load internal count value r0=External_Buffer; dm(EI10)=r0; // load EIx register with destination in ext. mem. r0=1; dm(EM10)=r0; // load external modify value r0=@Internal_TX_Buffer; dm(EC10)=r0; // load external count r0=0x00000405; dm(DMAC10)=r0; // dma enable, int>ext, master mode idle;
// Read back 16 words of data from the external SBSRAM in burst mode Setup_Receive_External_Data_DMA: r0=0; dm(DMAC10)=r0; // Clear DMA Control Register r0=Internal_RX_Buffer; dm(II10)=r0; // load IIx register with int. mem. source r0=1; dm(IM10)=r0; // load internal modify value r0=@Internal_RX_Buffer; dm(C10)=r0; // load internal count value r0=External_Buffer; dm(EI10)=r0; // load EIx register with ext. mem. destination r0=1; dm(EM10)=r0; // load external modify value r0=@Internal_RX_Buffer; dm(EC10)=r0; // load external count r0=0x00080401; dm(DMAC10)=r0; // enable burst, dma enable, ext->int, master mode
idle; r0=0; dm(DMAC10)=r0; // Clear DMA Control Register
// Compare Internal_TX_Buffer with Internal_RX_Buffer Verify_DMA: b0 = 0; // clear b0 register i0 = Internal_TX_Buffer; // point to the origin buffer l0 = 0; // no circular buffering m0 = 1; // set modify to 1
b1 = 0; // clear b0 register i1 = Internal_RX_Buffer; // point to the origin buffer l1 = 0; // no circular buffering m1 = 1; // set modify to 1 r1 = @Internal_RX_Buffer; // set number of locations to read lcntr = r1, do Verify_Mem until lce; r0 = dm(i0,m0); // Get TX value r1 = dm(i1,m1); // get RX value COMP(r0,r1); // check to see if equal if ne jump DMA_Fail; Verify_Mem: nop;
DMA_Pass: nop; jump DMA_Pass; DMA_Fail: nop; jump DMA_Fail;
_main.end:
.endseg;
//本代码ADSP21xx示例
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